Memory bus control unit



Jan. 25, 1966 L. o. ULFSPARRE 3,231,863

MEMORY BUS CONTROL UNIT Filed Dec. 30, 1960 75 Sheets-Sheet 1 F IG. lA

FIG. I B MEMORY BUS CONTROL UNIT FIG FIG. FIG. FIG. FIG. FIG. 4A 48 2A 20 2E 2s m;v FIG. FIG, FIG. F I G IC 25 20 2F 2H FIG FIG. FIGZI F l (5. ID FIG l E FIG. FIG. FIG. FIG. 4E 46 4H Fl G. F

FIG. FIG 9A 9B INVENTOR LARS 0, ULFSPARRE WaGW ATTORNEYS Jan. 25, 1966 Filed Dec. 30, 1960 FIG. IG

HG. ISA

FIGJGB FIGJI 75 Sheets-Sheet 2 FIGJH FIG. ITA

FIG. 18A

FIGJBA FIGJJ FIG. 25C

1966 L. o. ULFSPARRE 3,231,863

MEMORY BUS CONTROL UNIT Filed Dec. 50, 1960 75 Sheets-Sheet 5 FIG. 2A

BASiC EXCHANGE BX PROGRAM CHECK HIGH SPEED EXCHANGE Jan. 25, 1966 1.. o. ULFSPARRE 3,231,363

MEMORY BUS CONTROL UNIT Filed Dec. 30, 1960 '75 SheetsSheet 4 LOOK AHEAD flfijlu EFFECTIVE ADDRESS LOOK AHEAD REGISTER CONTROL EFFECTIVE ADDRESS REGISTER I/LA AOPT LOOK AHEAD HIGH SPEED EXCHANGE F I6. 28 BLOCKING DEOODER SEL mzv 78 I55 msmucnou PROCESSOR Jan. 25, 1966 L. O. ULFSPARRE MEMORY BUS CONTROL UNIT 75 Sheets-Sheet 5 Filed Dec. 30, 1960 me 2H 2H meizls 2l4 r r I300 FIG 5A,B.C,D,E,F I850 Ill Ill BUSY 5P1 TRIGGERS 2 20 W FIG. 2C

|52 95A ax ADR ans T-l5.P 95B BX ADR ans o-s.1s.n A 05 95B 2 BX A0,A|,B0,B| 82,83,5EL FIG 4A8 BASIC EXCHANGE Bx pmomn' n33 v MEMORY FRAME I53 DECODER H3 2 BXIA ,l,

1. 3 PU I EMA BASIC EXCHANGE FNHIBIT CIRCUITS F|G.6A m,

BASIC EXCHANGE ax REO Ln? we 5 CONTROL aw REQUEST TRAGGER we BX Rm RESET RESET HX ADR :19 l B|TS7I5,P 96A Hx ADR ans n-s,|s,n 06 A r H0 A I35 HXAQAHBQBMBLBLSEL |.ux 6 nmx FAG-46D ll.u 6fxxn 158 HIGH SiEED EXCHANGE Y MEMORY FRAME DEGODER HX INHIBIT 4' H0 Hm w I '88 Q INH Hx s l b m M w HIGH SPEED EXCHANGE w fig ggg (LL, HIGH SPEEDEXCHANGE INHIBIT CIRCUITS 189 HA IA CONTROL FEED REQUEST TR'GGER 1 get 202 IBBA/ ET 204 Rs 206 55 /|57 HX RED RESET Jan. 25, 1966 Filed Dec. 30, 1960 L. O. ULF'SPARRE MEMORY BUS CONTROL UNIT 75 Sheets-Sheet 6 LA ADR ans HSP I F I (T xxx: ggf LA ADR ans o-s.|s.n A

I 1988 I Q/ M LA A ABABABABASEL FIG. 4a; 3: m

"i LOOK man ,208 LA mman mAoaY FRAME 05cm ,zos LA Pmomv I60 I59 51;. L -LA53L -u0 ,223 6 1 K Fl /n5 (6 M LOOK N-IEAD A 5 mm mman cmcuns m M REQUEST TRIGGER 6 men SPEED EXCHANGE 4 \m LA Rea 224 |64 BLOCKING CONTROLS A M 6 HX BLOCK A Mommas msmucnon umr m1A ,A,.a ,B.,a ,a,,sEL NOT BUSY MEMORY FRAME ocooosn 2'3 2 sae 985 I65 21 I REO FIG.

msmucnou um msouesr TRIGGER 5 1 R RESET ,99

A ll! XX 38%: 3| I INH 1 l 232 2 0R BL L. H9 3 HG 2D SE Emu 1 PRIORITY L 5g] msmucnon um "6 BLOCK 1 m use ACCEPT cmcuns xxx,

XXII

Jan. 25, 1966 Filed Dec.

L. O. ULFSPARRE MEMORY BUS CONTROL UNIT 75 Sheets-Sheet 7 FIG. 2E

FIG BA BASE EXCHANGE MEMORY SELECT CIRCUITS FIG BB HIGH SPEED IIEIIORY SELECT CIRCUITS FIG IZA BASIC EXCHANGE PRIORITY 'ANlT' FIGIZB HGII SPEED PRIORITY 'AIID' BX ADR III-GATE IIX ADR lN-GATE LA ADRIII-GATE I ADR lN-GATE BASIC EXCHANGE III-GATE CONTROL BX III-GATE FIG I4 B I'KIH SPEED EXGHANE IN-GATE CONTROL s & xm

LA I

GAT

:s-Sheef 3 HII RA GATE ex FETCH- FIG. I40

LOOK AHEAD IN-CATE CONTROL XXX):

IRA cm 287M283 IN IIITE FIG. I4D

INSTRUCTION UNIT IN-CATE CONTROL XXX! I LOOK AHEAD MEMORY SELECT CIRCUITS E81 Ex 5 L. O. ULFSPARRE MEMORY BUS CONTROL UNIT I98A I988 I131 5 Jan. 25, 1966 Filed Dec. 30, 1960 LA CATE IZT I .I2C

TIC ISO INSTRUCTION UNIT MEMORY SELECT CIRCUITS FIG. 2 F

HCATE FI O. I20

INSTRUCTION UNIT )UULX PRIORITY "AND" Jan. 25, 1966 Filed Dec. 50, 1950 MEMORY SEL EOT GATES FIG. 16 A BC L. o. ULFSPARRE 3,231,863

MEMORY BUS CONTROL UNIT '75 Sheets-Sheet 9 RESET A0 EUSY TGR FIG IT A B MEMORY READ OUT CONTROL FETCH 254 BX STORE HX STORE STORE/FETCH B Jan. 25, 1966 o. ULFSPARRE 3,231,363

MEMORY BUS CONTROL UNIT Filed Dec. 30. 1960 '76 Sheets-Sheet 10 MEMORY LOW SPEED FIG. 2H

25, 1966 1.. o. ULFSPARRE MEMURY BUS CONTROL UNIT 75 Sheets-Sheet 11 Filed Dec. 30, 1960 Jan. 25, 1966 L. o. ULFSPARRE MEMORY BUS CONTROL UNIT 75 Sheets-Sheet 18 Filed Dec. 30, 1960 E A A E W A EMA/28A,, magi 22m: 5 $21 A A A E Q 5.. 5 8 g A M 1 C I I :8 E5 :5, f: mo A D M E; 52 E5: 5 vii N A A U V L M H m A1 A: ll; a; lllll'lllllu'lll-IIIII'IIII A d N2 5885 22$: A E R LE III!!! A? A Q E @2322, E05: 9B5 E 0 E j 5 D 1. E a; N A N E 25 A d A A Z; 55 5 E 5.. 5 2 A --s- E5 5 I 0 AL N All. A A a; 52 E5: 2:1 5 mm :1 5 2 A -z- 5: E5: 2 5 I Jan. 25, 1966 1.. o. ULFSPARRE MEMORY BUS CONTROL UNIT 75 Sheets-Sheet 19 Filed Dec. 30, 1960 5 e: E5: 5 2 JCT E55 5 KO+A 2 23% 5:2. 5 2 AT 55. 5 E r A D AL a2 E 55: m 3: N J T A A D A 5 5w 5: 5 a A111 N 32555 55: m 5 I AT H A A A mo ATtll: In Al lll'llllv T A 2: 539 mz m. D Iii a: 52 as; N 3: E: 955 N M L 1 A m A D 2 E E Q 52 5 2 A A N 3552 E52 5 ram? E2 E5 55: A 5 A mom 4 I 1 L 2 82 E5: 5 I: 0 AL N A AT 5558A :5 A A D Q $52 :55: 5 2; E Q 5: 5 a N A T A is E5355: 5 mol M A A Jan. 25, 1966 1.. o. ULFSPARRE MEMORY BUS CONTROL UNIT '75 Sheets-Sheet 20 Filed Dec. 30, 1960 r A :m D A E583! 22 22% E: 22K M A 4 T A E; E. 55: 3 m-: D AF N A A A Al :5 sa ATAIIIIIH AL R :5 mg m: @124 I l E f m At 55: 52 A1. I; a: m A 25 22 A A 3; Emm A D ATL N Al m A E5 s: 5% 5-21 I A 

1. IN A DATA HANDLING SYSTEM, FIRST AND SECOND MEMORY DEVICES HAVING A PLURALITY OF STORAGE REGISTERS ACCESSIBLE IN A PREDETERMINED TIME INTERVAL, THE ACCESS TIME OF INFORMATION STORED IN SAID FIRST MEMORY DEVICE BEING SHORTER THAN THE ACCESS TIME OF INFORMATION STORED IN SAID SECOND MEMORY DEVICE, MEANS COUPLED TO SAID MEMORY DEVICES FOR SELECTING A GIVEN MEMORY DEVICE AND ADDRESSING A GIVEN STORAGE REGISTER THEREIN FOR READING INFORMATION THEREFORM, A PLURALITY OF LOAD DEVICES, A SINGLE OUTPUT BUT COUPLING BOTH OF SAID MEMORY DEVICES TO ALL OF 